Google in talks with Marvell on AI inference chips, cutting reliance on Broadcom

Google is preparing its next move in chip strategy: the company is in talks with Marvell to build two specialized AI accelerators, extending its development chain beyond Broadcom. If the talks end in a deal, Google gains another partner for custom silicon and strengthens its bet on cheaper, high-volume inference rather than only on training large models.

According to available information, the talks cover two new chips. The first is a memory processing unit, a component built for handling memory and data transfer inside AI systems. The second is a TPU optimized specifically for inference, the stage where a model is already trained and has to answer user requests quickly.

This is a sensitive area for Google: the more requests flow through Gemini, search, advertising and cloud services, the greater the pressure from the cost of each response and from data center power consumption.

Google is already not building its custom silicon ecosystem alone. Broadcom has long been the key partner, and MediaTek also appears in the development chain. Marvell as a potential third partner means more than a longer list of contractors. It is a way to spread risk, avoid depending on a single supplier of critical components, and test different engineering approaches in parallel for different classes of workloads, from training to serving models in production.

It is important that these are so far only negotiations: based on available information, there is no signed contract yet. But the talks themselves show where the market is heading. Amid the generative AI boom, companies are increasingly designing their own chips because general-purpose GPUs remain expensive, scarce and not always optimal for a specific task. Inference is an especially attractive target for customization: it is where user-facing products ultimately scale, and where latency, price per request and predictable performance matter.

The memory processing unit is of particular interest. In AI infrastructure, the bottleneck is often not raw compute but the speed at which data reaches the accelerator. The more efficiently a system handles memory, the less its compute units sit idle and the better already-installed hardware can be used. Such solutions can therefore matter as much as the TPUs themselves: they improve overall system balance and reduce losses from moving data.

For Google this is a particularly logical step. The company has developed its TPU line for many years and knows how to tie hardware closely to its software, data centers and cloud infrastructure. New specialized blocks could help it tune the stack more precisely for different scenarios: one for training, one for serving a huge number of requests, one for memory-related bottlenecks. This approach usually delivers not only a speed gain but also tighter control over unit cost, delivery timelines and dependence on the external ecosystem.

There is another layer to the story: Google's negotiating position. With several design partners, it is easier for the company to allocate projects by specialization and not tie its whole roadmap to the pace of a single contractor. In an industry where the launch of a new generation of AI hardware directly affects cloud margins and product launch speed, this flexibility becomes a strategic asset. Even without a final contract, the dialogue with Marvell shows that Google is preparing alternatives in advance and widening its room to maneuver.

In practical terms, this news matters not because Google found another chip manufacturer, but because the largest AI companies are moving toward a more fragmented, specialized hardware architecture. The winner will not be whoever simply has more accelerators, but whoever allocates roles among them better. If the Marvell deal goes through, it will be one more signal that the next phase of the AI race is being fought not only over models but over the economics of inference, where every watt and every millisecond gained turns into a competitive advantage.