China's CXMT Plans to Show 4F² DDR5 RDIMM by Year-End

Chinese memory maker CXMT (ChangXin Memory) expects to release a new generation of server DDR5 RDIMM modules before the end of 2026. For the first time, the company will combine 4F² cell architecture, hybrid wafer bonding, and updated DRAM devices in them. In theory, a 4F² cell is one-third smaller in area than 6F², the design on which almost all mainstream DRAM is built today. Company president Cao Kanyu made the announcement at the fourth conference on integrated chips and chiplets.

Why 4F² Is Hard

Here, F is the minimum feature size. A DRAM cell occupies some number of F² in area, and the smaller that number, the more bits fit on a die without moving to a finer lithography process. Going from 6F² to 4F² cuts the area from six units to four, or by 33%.

On paper, this looks like free density. In practice, it is not. Fitting a transistor and a capacitor into such an area usually requires a vertical-channel transistor, and the demands grow around the cell: patterning precision, parasitic coupling, and leakage. Samsung and other manufacturers have published research on this direction for years, but 4F² has yet to appear in volume products. If CXMT really does bring a finished module to market, it will be a notable step for a company that started out playing catch-up.

Why Hybrid Bonding Matters Here

In his talk, Cao Kanyu singled out hybrid bonding. It is a direct copper-dielectric connection between two wafers without microbumps: the cell array can be made on one wafer and the peripheral logic on another, and the two are then bonded face to face.

Pairing it with 4F² is a natural fit. A compact vertical cell array coexists poorly with the support circuitry that traditionally sits beside it on the same die. Moving the periphery to a separate wafer lets engineers optimize the process for each part and save area. This is our inference from the logic of the architecture, not a company statement: the specific scheme is not disclosed in the available materials.

There is also a second motive. The same bonding technologies are needed for multilayer high-bandwidth memory, so progress in hybrid bonding may prove useful well beyond a single module family.

What We Know About the Product

• Format: DDR5 RDIMM, i.e., server registered modules.
• Cell architecture: 4F² instead of the mainstream 6F².
• Theoretical cell-area gain: about 33%.
• Accompanying technologies: new DRAM devices and hybrid wafer bonding.
• Timeline: the company says the end of 2026.
• Not disclosed in the available material: capacity, speeds, process node, power consumption, production volumes, and customers.

What to Watch Next

What matters to the market is not talk about architecture but three practical parameters: die yield, cost per bit, and reliability stability. These will decide whether 4F² becomes a real advantage or remains a technology demonstration. Cell area alone says little if it costs extra process steps and lost yield.

For buyers of server memory, the coming months will be a wait for samples. Data center operators in China who need local sources of DDR5 should request data on reliability and platform compatibility, not on claimed density. Everyone else should watch whether independent tests appear and which platforms announce support.

If the modules reach the sample stage by year-end, competitors will have one fewer argument in the conversation about CXMT's technological lag. If the date slips, that will also be a telling signal of how ready 4F² is for volume production.