2027 Servers: Rubin Ultra, New Instinct GPUs and PCIe 7.0 Are Reshaping Data Center Plans

In 2027, server hardware will get several major upgrades at once. Nvidia is planning Rubin Ultra: a Kyber rack with 576 GPU dies, up to 1 TB of HBM4E memory per package and about 15 exaflops of FP4 inference performance. PCIe 7.0 doubles the speed to 128 GT/s per lane, and the open UALink 1.0 standard is designed for clusters of up to 1024 accelerators.

Sergey Kovalev, a product manager at Selectel, wrote an overview of the topic on Habr. The announcement says only that new GPUs, CPUs, open interconnects and a new memory architecture are coming. It gives no figures, and most of the text is hidden behind a cut. The piece appears on the corporate blog of a cloud provider, so read it with the author's interests in mind. Below are guideposts from vendors' public roadmaps. Timelines and specifications in them may have shifted, so check them against current announcements.

Accelerators: density is growing faster than racks

After Vera Rubin in the second half of 2026, Nvidia has slotted Rubin Ultra for 2027. The bet is on memory and packaging: four reticle-size dies in a single package and up to 1 TB of HBM4E. For comparison, the standard Rubin is listed with 288 GB of HBM4. To reach this density, the vendor is moving to Kyber racks, where the power of a single rack is measured in hundreds of kilowatts.

AMD is responding with the Helios rack-scale system built on Instinct MI400 (72 GPUs, up to 432 GB of HBM4 per accelerator) and promises a next generation of the line for 2027. For buyers, this means a real alternative at procurement time, as long as the ROCm software stack holds up.

Interconnects and memory: open standards advance

The main change for infrastructure is happening not inside the dies, but between them. Key elements:

• PCIe 7.0: 128 GT/s per lane, up to 512 GB/s bidirectional on x16;
• UALink 1.0: an open protocol for connecting accelerators, up to 1024 devices in a single domain, 200 GT/s per lane;
• CXL: memory pooling and expansion beyond a single server, based on PCIe 6.0 and newer;
• HBM4: a 2048-bit interface, up to 2 TB/s per stack, while HBM4E is designed for even greater capacity.

UALink creates a counterweight to the closed NVLink. Nvidia does have a response, though, in NVLink Fusion, which allows third-party CPUs to connect. Operators who need a mix of accelerators from different manufacturers in one cluster stand to benefit. But the ecosystem of switches and drivers will not mature right away.

CPUs: more cores, the bottleneck shifts

AMD is preparing EPYC on Zen 6 (code-named Venice) on a 2 nm process, with up to 256 cores per socket. Intel is developing its next-generation Xeon, including Diamond Rapids. For AI workloads, the CPU remains an orchestrator: it prepares data and handles networking and storage. Even so, memory channel width and the number of PCIe lanes are often more important than core count.

The main constraint in 2027 is unlikely to be compute. Power and cooling will be the limit: a 600 kW rack requires liquid cooling and a substation, not just new servers.

The practical takeaway for IT teams is this. Plan 2027 purchases now. Check whether your facility can handle a density above 100 kW per rack. It is better to design the cluster architecture around PCIe 6.0/7.0 and open fabrics so you do not get locked into a single vendor. If your provider announces delivery dates for new GPUs, ask for specific SKUs and power requirements rather than general promises. The full Selectel overview is worth reading on Habr and comparing against the vendors' figures.