AMD и Intel утвердили инструкции ACE — ускорители ИИ войдут в будущие x86-процессоры

AMD and Intel have published a joint specification for AI Compute Extensions (ACE) — a set of new instructions for future x86-based processors that will add specialized compute blocks to accelerate artificial intelligence tasks directly in CPU cores.

Why ACE was needed

Since autumn 2024, AMD and Intel have been collaborating within the x86 Ecosystem Advisory Group. The main goal is to protect the position of the classical architecture amid growing competition from Arm and RISC-V, which are actively conquering the server, laptop, and embedded systems markets. Just a few years ago, x86 was an undisputed standard for personal computers and servers.

This is no longer the case: Apple Silicon on Arm has demonstrated professional performance in laptops, Qualcomm Snapdragon X Elite has entered the Windows device market, and Arm-based servers from Ampere and AWS Graviton are capturing an ever-larger share of cloud data centers. In this context, the joint ACE specification is a response from both manufacturers to a common threat. A unified standard will allow software developers to implement ACE support once and gain acceleration on both AMD and Intel chips without needing separate optimization for each manufacturer.

What ACE can do

ACE is based on matrix multiplication — the fundamental mathematical operation of neural networks. It accounts for the majority of computational time when running language models, image recognition systems, and other AI applications. The specification is focused primarily on AI inference — that is, running already-trained models in production environments rather than training them. For this scenario, support for quantized weights is particularly important: formats such as INT4, INT8, FP8, and related ones allow larger models to fit in memory with significantly lower resource requirements.

Key capabilities provided by the specification:

• Specialized matrix multiplication blocks within CPU cores
• Support for quantized data formats (INT4, INT8, FP8)
• Optimization for AI inference tasks, not training
• Unified specification for AMD and Intel processors
• Compatibility with the existing x86 ecosystem

It is important to note that ACE describes the ISA level — a set of instructions, not microarchitectural implementation. Each manufacturer will build hardware blocks differently, but software code written for ACE will work on both AMD and Intel.

Competition drives the union

AMD and Intel are historical competitors, with a rivalry spanning decades. A joint public technical project between them is a rare occurrence and in itself telling: it demonstrates the seriousness of the pressure being exerted on the x86 ecosystem. Arm has already proven its ability to compete with x86 in performance.

RISC-V, though currently less mature, is actively gaining support in academic and industrial circles. If x86 does not offer a competitive AI standard, developers risk beginning to optimize solutions for Arm platforms, which already have established extensions — NEON, SME2, and others. Moreover, the authors of major AI frameworks — PyTorch, ONNX Runtime, TensorFlow Lite — are interested in stable standards.

A unified specification reduces the cost of x86 support for them and makes the platform more attractive as a target for optimization efforts.

What this means

ACE is the first major joint technical standard from the two leading x86 market players in a long time. If the specification gains widespread adoption, the next generation of x86 systems will be able to run local AI models more efficiently without additional NPU or GPU. For the enterprise segment, this means greater flexibility in deploying AI applications; for consumer devices, it means better performance without increased cost.