AMD and Intel Finalize ACE Instructions: AI Accelerators Coming to Future x86 Processors

AMD and Intel have published a joint specification, AI Compute Extensions (ACE): a set of new instructions for future x86 processors that add specialized compute units for accelerating artificial intelligence tasks directly in CPU cores.

Why ACE Was Needed

Since autumn 2024, AMD and Intel have worked together in the x86 Ecosystem Advisory Group. The main goal is to protect the classic architecture's position as competition grows from Arm and RISC-V, which are actively gaining ground in servers, laptops and embedded systems.

Just a few years ago, x86 was the undisputed standard for personal computers and servers. That is no longer so clear-cut: Apple Silicon, built on Arm, has delivered professional-grade performance in laptops, Qualcomm Snapdragon X Elite has reached Windows devices, and Arm servers such as Ampere and AWS Graviton hold a growing share of cloud data centers.

Against this backdrop, the joint ACE specification is both manufacturers' answer to a shared threat. A single standard lets software developers implement ACE support once and get acceleration on both AMD and Intel chips, without optimizing separately for each vendor.

What ACE Does

ACE is built on matrix multiplication, the basic mathematical operation of neural networks. It accounts for most of the compute time when running language models, image recognition systems and other AI applications.

The specification focuses primarily on AI inference, meaning running already trained models in production rather than training them. For this scenario, support for quantized weights matters most: INT4, INT8, FP8 and related formats let larger models fit in memory with far lower resource requirements.

Key capabilities defined in the specification:

• Specialized matrix multiplication units inside CPU cores
• Support for quantized data formats (INT4, INT8, FP8)
• Optimization for AI inference, not training
• A single specification for AMD and Intel processors
• Compatibility with the existing x86 ecosystem

Importantly, ACE describes the ISA level, the instruction set, not the microarchitectural implementation. Each manufacturer will build its hardware units its own way, but code written for ACE will run on both AMD and Intel.

Competition Pushes Them Together

AMD and Intel are historic rivals, and their competition spans decades. A joint public technical project between them is rare and telling in itself: it shows how much pressure the x86 ecosystem is under.

Arm has already proven it can compete with x86 on performance. RISC-V, though still less mature, is steadily gaining support in academic and industrial circles. If x86 does not offer a competitive AI standard, developers risk starting to optimize for Arm platforms, which already have established extensions such as NEON, SME2 and others.

Major AI framework authors, including PyTorch, ONNX Runtime and TensorFlow Lite, also want stable standards. A single specification lowers their cost of supporting x86 and makes the platform more attractive for optimization work.

What This Means

ACE is the first major joint technical standard in a long time from the two main players in the x86 market. If the specification gains wide adoption, the next generation of x86 systems could run local AI models more efficiently without an additional NPU or GPU. For the enterprise segment, that means more flexibility in deploying AI applications; for consumer devices, better performance without a rise in cost.